arm代做 | 汇编代写 | lab – ELEC3270 lab #4: Introduction to Output Compare 1

ELEC3270 lab #4: Introduction to Output Compare 1

arm代做 | 汇编代写 | lab – 这是利用arm进行训练的代写, 对arm的流程进行训练解析, 是比较典型的arm等代写方向, 这是值得参考的lab代写的题目

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ELEC3270 lab #4: Introduction to Output Compare 1/


A. Coding an Output Compare Interrupt Service Routine (1/2 a second) (35%) B. Coding an Output Compare Interrupt Service Routine (1 second) (65%)


We have previously noted from lab 2 that using instruction delays is not an appropriate method to generate accurate timing in the microcontroller. Due to interrupts priorities, instruction execution times, and hardware delays, we cannot guarantee timing accurate signals. For example, the transmission to the SCI can use a variable amount of time. The output compare (OC) is a function which can perfectly time a signal with very little coding and MPU overhead. For this section of the lab, we will be setting up an OC interrupt to toggle the output of PA6. This pin is connected to the OC #2 timer hardware, or OC2. The OC behaves like an al arm clock; when the OCn (where n can be 1-5) trigger register (TOCn) is equal to the free running timer (TCNT), the associated output OCn can be set to 0, 1, or toggled (based on the settings of TCTL1). Since the microcontroller only has a 16-bit timer, one second is far out of the hardware timer range (remember the timer overflows every 32.77 ms with E-clock at 2 MHz). If we set our timer pre-scaler to 16 (a divider which will adjust how many pulses of E-clock occurs before TCNT increments; see TMSK2), then the timer will overflow every 524.288 ms (65536 timer ticks), which is longer than 1/2 a second. A 1/2 second is exactly 62500 timer ticks (with E-clock at 2 MHz with a pre- scalar of 16). We therefore have to toggle PA6 every 62500 timer ticks (TCTL1; OC2 can be set to toggle, set or clear PA6). We do this by setting OC2s trigger time (TOC2) to be 62500 more than it was previously (read it, add 62500 to it, store it back). This is the core operation of our OC2 ISR. We still have to set OC2 to occur during our code initialization (62500 more than TCNT to be proper) as well as clearing the interrupt flag (TFLG1) once the ISR is done. The base code is setup to print the number of times the LED has toggled each time it actually toggles; this value is 4-digit HEXADECIMAL. You will need to change this so that it prints out a 4-digit DECIMAL value instead (by adding the appropriate BCD adding code; a few lines). This timer will effectively increment every half-second that passes. If you were to run your code for exactly an hour, you will find that this counter will be exactly 7200. Download the base code lab4base1.asm from the course website, and save it as SID_4a.asm . Dont forget to set TMSK1 correctly to enable the ISR.


In part A, we could not setup OC2 to generate a 1 second timing delay due to the 16-bit resolution of the internal timer. In order to achieve larger delays, we can still have the OC2 interrupt occur, we simply just decide whether or not to toggle the LED. Assuming there is no timing pre-scaler, to achieve a 1 second delay, we would have to wait 2000000 timing cycles. Since the timers resolution is only 16-bits, we should break up this delay so that we can divide it into an integer number of 16-bit numbers. Using a timer pre-scaler of 1, we can divide 2000000 by 32 to obtain 62500. We therefore could have 32 OC2 interrupts occur before we toggle PA6; OC2 can be set to toggle, set or clear PA6. This section of the lab is an extension of part A. Recode your OC2 interrupt to set or clear PA6 when you have had 32 previous interrupts; you know this by modifying count. Also change your main code to print the BCD values ONLY when PA6 toggles (you can do this by checking count). Download the base code lab4base2.asm from the course website, and save it as SID_4b.asm ; the counter count is declared for you. You can verify your code by checking the output counter with respect to any time-of-day clock. ZIP both of your ASM files into and upl oad it to blackboard before the posted due date.